MyRoboPathOpen Robotics Lab
microcontrollers15 min readUpdated 2026-03-08Beginner

How Microcontrollers Work? Clock, Fetch-Decode-Execute & Internal Registers

Step inside the CPU core: discover how crystal oscillators generate clock pulses, how the Fetch-Decode-Execute cycle runs machine code, and how the ALU calculates data.

MyRoboPath Engineering Lab
Peer-Reviewed Open-Source Hardware & Firmware Guide

Key Engineering Takeaways

  • •The crystal oscillator provides the rhythmic electrical clock pulse coordinating every internal transistor transition in the MCU.
  • •The CPU executes machine code in a continuous 3-stage loop: Fetch instruction from Flash -> Decode binary opcode -> Execute operation in ALU/Registers.
  • •The Program Counter (PC) register tracks the exact memory address of the next instruction to execute.
  • •Hardware Interrupts allow external events (like an encoder tick or emergency stop button press) to instantly pause normal execution and jump to an Interrupt Service Routine (ISR).
Prerequisites
  • • Binary numbers (0 and 1) and Basic MCU definition
Required Hardware / Tools
  • • Oscilloscope or Logic Analyzer (optional for observing clock signals)

The Heartbeat: Crystal Oscillators & Clock Cycles

A microcontroller is a synchronous digital circuit—nothing happens inside the silicon without a timing signal.

A Quartz Crystal Oscillator vibrates at an exact physical frequency when energized (due to the piezoelectric effect).

  • On an Arduino Uno, a $16\,\text{MHz}$ crystal oscillates 16 million times per second (one clock tick every $62.5\,\text{nanoseconds}$).
  • On an ESP32, an internal Phase-Locked Loop (PLL) multiplies a $40\,\text{MHz}$ crystal up to $240\,\text{MHz}$ (one clock tick every $4.16\,\text{nanoseconds}$).

With each clock tick, electrons advance through logic gates, moving instructions along the processor pipeline.

Crystal oscillator square wave clock pulse diagram
Figure 3.1: Quartz crystal oscillator generating synchronous square wave clock pulses.Visual Guide

The Fetch-Decode-Execute Instruction Pipeline

Every line of C/C++ code you write (such as digitalWrite(13, HIGH) or speed = error * 2.5) is translated by the compiler into raw binary numbers called Machine Code Opcodes stored in Flash memory.

The CPU core processes these opcodes through the fundamental Instruction Cycle:

  1. 1
    Fetch: The CPU reads the 16-bit or 32-bit binary instruction located at the memory address currently pointed to by the Program Counter (PC) register, and loads it into the Instruction Register (IR). The PC then automatically increments to point to the next instruction.
  2. 2
    Decode: The internal Instruction Decoder circuit analyzes the binary bit pattern to determine what action is required (e.g., "Add Register R1 to R2", or "Write 1 to GPIO Pin 13").
  3. 3
    Execute: The Arithmetic Logic Unit (ALU) performs the calculation, or data is transferred between registers and I/O peripheral pins.
Fetch Decode Execute CPU cycle flowchart
Figure 3.2: The 3-stage CPU instruction execution pipeline: Fetch -> Decode -> Execute.Visual Guide

Internal CPU Registers (Program Counter, Stack Pointer, ALU)

Registers are ultra-fast, single-word memory storage locations built directly inside the CPU silicon core:

  • Program Counter (PC): Holds the memory address of the next instruction to fetch.
  • Arithmetic Logic Unit (ALU): The mathematical engine that performs addition, subtraction, bitwise AND/OR/XOR operations, and comparisons.
  • General Purpose Registers (R0 - R31): Hold temporary numbers during mathematical computations.
  • Stack Pointer (SP): Points to the top of the call stack in SRAM, remembering where to return after a function call completes.
  • Status Register (FLAGS): Stores 1-bit flags indicating calculation results (Zero flag $Z$, Carry flag $C$, Negative flag $N$, Overflow flag $V$).
CPU registers and ALU internal connection diagram
Figure 3.3: CPU register bank, Arithmetic Logic Unit (ALU), and data bus interaction.Visual Guide

Frequently Asked Questions

What is an Instruction Pipeline?

Modern 32-bit ARM and RISC-V microcontrollers use instruction pipelining. While instruction 1 is executing in the ALU, instruction 2 is being decoded, and instruction 3 is being fetched from Flash simultaneously, achieving nearly 1 instruction executed per clock cycle (1 IPC).

Tags:#Basic Microcontrollers#CPU Architecture#Fetch Decode Execute#ALU#Registers#Clock Cycle